The CPU stands
for central processing unit.
It is central in that all other computer components depend on the CPU.
A processor in that it processes data.
And a unit in that it is a self-contained device.
(AMD Athlon™ 64 FX-70 series processor. Courtesy of Advanced Micro Devices, Inc.)
It is central in that all other computer components depend on the CPU.
A processor in that it processes data.
And a unit in that it is a self-contained device.
(AMD Athlon™ 64 FX-70 series processor. Courtesy of Advanced Micro Devices, Inc.)
Importance to the PC Technician :
A technician
must be knowledgeable of the capabilities and architectures of various CPUs.
This knowledge is required to make recommendations for and perform CPU upgrades.
This knowledge is required to make recommendations for and perform CPU upgrades.
Bus
Architectures and Bus Speeds :
CPU Structure and Operation
Instruction Set :
CPUs run a
set of commands called the instruction set.
Instruction set is written in assembly language—a low-level programming language.
A compiler converts a high-level programming language into assembly language.
Instruction set is written in assembly language—a low-level programming language.
A compiler converts a high-level programming language into assembly language.
Bus Unit :
Connects all
the other major CPU components together.
Accepts data through the input bus.
Sends data through the output bus.
Accepts data through the input bus.
Sends data through the output bus.
Data Cache and Instruction Cache :
Data cache
temporarily stores data.
Instruction cache temporarily stores instructions.
Instruction cache temporarily stores instructions.
Decode Unit :
Decodes
instructions sent to the CPU.
Works under the direction of the control unit.
Transmits data to other areas in an understandable format.
Works under the direction of the control unit.
Transmits data to other areas in an understandable format.
Register Unit :
Is composed
of small storage units called registers.
Each register has a unique identity.
Each register stores a single data element.
Each register has a unique identity.
Each register stores a single data element.
Arithmetic Logic Unit (ALU) :
Performs
mathematical functions on data stored in registers.
Typical CPU Operations :
Refreshing
memory.
Checking for communication from devices through hardwired and software IRQs.
Monitoring system power.
Performing any other programmed duties.
Checking for communication from devices through hardwired and software IRQs.
Monitoring system power.
Performing any other programmed duties.
CPU Power :
CPU Speed :
Determines
how fast the CPU can process data and commands.
Measured in Hertz (Hz)
Measured in Hertz (Hz)
Enhancing CPU Operations :
Improvements
to the local bus (front side bus).
Additional cache.
Addition of a math coprocessor.
Additional cache.
Addition of a math coprocessor.
Cache Types :
Review :
· The function of the _____ unit is to
connect all the other major CPU components together.
A : bus
A : bus
· The _____ unit converts instructions
and data and transmits the data to other areas of the CPU in an understandable
format.
A : decode
A : decode
· The _____ performs mathematical
functions on data stored in the register unit.
A : ALU (arithmetic logic unit )
A : ALU (arithmetic logic unit )
· The _____ is a temporary memory area
that is used to store incoming data.
A : data cache
A : data cache
· The _____ is a temporary memory area
that is used to store instructions.
A : instruction cache
A : instruction cache
CPU Descriptive Features
Processor Descriptive Features :
System Management Mode (SMM)..
Clock Doubling..
Overclocking..
RISC..
CISC..
MMX..
Multiple Branch Prediction..
Superscalar..
Dynamic Execution..
Dual Independent Bus..
Real.. Protected.. and Virtual Modes.
Simultaneous Threading..
Processor Affinity..
Processor Throttling.
System Management Mode (SMM) first developed for laptops to conserve
energy when using a battery. Can put a computer in a state of sleep or shut
down the computer. Controlled by software. Usually set up in the CMOS Setup
program.
Clock Doubling :
Overclocking :
The process
of forcing a CPU to run faster than its approved speed.
Not supported by manufacturers.
Excessive heat may develop and may damage the CPU.
The CPU may also freeze and issue a fatal error message.
Not supported by manufacturers.
Excessive heat may develop and may damage the CPU.
The CPU may also freeze and issue a fatal error message.
RISC :
Reduced
instruction set computer (RISC) is a type of CPU architecture with a fewer
number of transistors and commands than a CPU of CISC architecture.
CISC :
Complex
instruction set computer (CISC) is a type of CPU architecture with a more
complex instruction set than a CPU of RISC architecture.
MMX :
An MMX
processor is based on a standard processor.
Has an additional 57 commands.
Many new commands replaced those carried out by the sound and video card.
L1 cache is larger than that of a standard processor.
Has an additional 57 commands.
Many new commands replaced those carried out by the sound and video card.
L1 cache is larger than that of a standard processor.
Multiple Branch Prediction :
Multiple
branch prediction guesses what data element will be needed next.
Has been proven to be 90% accurate in repetitive tasks.
Significantly speeds up CPU operations.
Has been proven to be 90% accurate in repetitive tasks.
Significantly speeds up CPU operations.
Superscalar Technology :
Superscalar
technology was introduced with the Pentium.
Ability to process multiple instructions simultaneously.
Uses parallel paths called pipelines.
Speed is improved beyond the limits of the clock.
Ability to process multiple instructions simultaneously.
Uses parallel paths called pipelines.
Speed is improved beyond the limits of the clock.
Dynamic Execution :
Describes
the enhanced, the superscalar, and multiple branch prediction features of the
Pentium II.
Moves ahead an instruction if it can be carried out faster than the one that had preceded it.
Moves ahead an instruction if it can be carried out faster than the one that had preceded it.
Dual Independent Bus (DIB) :
A bus
architecture introduced with Pentium Pro.
One bus connects to the main memory and the other to L2 cache.
One bus connects to the main memory and the other to L2 cache.
Real, Protected, and Virtual Modes :
Real Mode
and Protected Mode :
Simultaneous
Threading :
Simultaneous
threading is executing two or more threads at the same time.
A thread is a part of a software program that can be executed independently of the entire program.
A thread is a part of a software program that can be executed independently of the entire program.
Processor Affinity :
Allows you
to select the number of CPU cores to apply to a software application.
Processor
Throttling :
A method of
controlling processor frequency to conserve battery life and produce less heat.
AMD Cool ′n′ Quiet . Intel® Precision
Cooling. Enhance Intel SpeedStep®.
CPU Voltages :
Motherboards
are designed in different ways to achieve CPU voltage levels:
Jumpers… Voltage regulator...
Always read the motherboard documentation before installing a CPU to ensure proper voltage level is set.
Jumpers… Voltage regulator...
Always read the motherboard documentation before installing a CPU to ensure proper voltage level is set.
Review :
· Which of the following terms
describes a technology that guesses what data element will be needed next?
MMX
Superscalar
Dynamic execution
Multiple branch prediction
MMX
Superscalar
Dynamic execution
Multiple branch prediction
A : D
· Which of the following terms
describes a technology that processes multiple commands simultaneously?
MMX
Superscalar
Dynamic execution
Multiple branch prediction.
MMX
Superscalar
Dynamic execution
Multiple branch prediction.
A : B
· Which of the following terms
describes a type of processor that has enhanced abilities to support multimedia
technology?
MMX
Superscalar
Dynamic execution
Multiple branch prediction
MMX
Superscalar
Dynamic execution
Multiple branch prediction
A : A
· Which of the following terms
describes the enhanced superscalar and multiple branch prediction features associated
with the Pentium II?
MMX
Superscalar
Dynamic execution
Multiple branch prediction
MMX
Superscalar
Dynamic execution
Multiple branch prediction
A : C
· Which of the following terms
describes the ability to select the number of CPU cores to apply to a software
application?
Processor affinity
Processor throttling
Simultaneous threading
Dynamic execution
A : A
Processor affinity
Processor throttling
Simultaneous threading
Dynamic execution
A : A
Processor Types
Socket and Slot Styles :
The CPU is
physically packaged in two main styles :
1) Single Edge Contact (SEC).
2) Pin grid array (PGA) - The pattern of pins on the socket style.
(AMD Athlon™ 64 x 2 dual-core processor. Courtesy of Advanced Micro Devices, Inc.)
3) Socket
1) Single Edge Contact (SEC).
2) Pin grid array (PGA) - The pattern of pins on the socket style.
(AMD Athlon™ 64 x 2 dual-core processor. Courtesy of Advanced Micro Devices, Inc.)
3) Socket
Zero
Insertion Force (ZIF) Socket :
Have a lever
to assist in the installation of the CPU.
When the lever is lowered, the ZIF socket clamps the CPU pins in place.
When the lever is lowered, the ZIF socket clamps the CPU pins in place.
AMD
Processors :
To RAM To
other devices, south bridge, and other CPUs DDR memory controller HyperTransport
link AMD 64 core 2 AMD 64 core 1 L1 instruction cache L1 instruction cache L1
data cache L1 data cache Core 1 L2 cache Core 2 L2 cache
Intel
Multi-Core Processor To FSB Intel Duo core 1 Intel Duo core 2 Core 1 L1 data
cache Core 2 L1 data cache Core 1 L1 instruction cache Core 2 L1 instruction
cache L2 cache
Socket 478
:
Socket 775
:
Socket 423
:
Socket 479M
:
Socket 939
:
Socket AM2
:
Slot A :
Socket 754
:
Socket 940
:
Review :
· In which two main styles are CPUs
physically packaged ?
A : Socket Single Edge Contact, or SEC
A : Socket Single Edge Contact, or SEC
· The pattern of pins on the socket
style is called a(n) _____.
A : PGA
A : PGA
· ZIF sockets have a(n) _____ to assist
in the installation of the CPU.
A : lever
A : lever
Upgrading the CPU
Cooling the
CPU :
Heat Sink
and Fan Liquid Cooling System (Courtesy of Swiftech Inc.)
Upgrading the CPU :
What are you
trying to achieve by upgrading the CPU?
Is the upgrade processor compatible physically with the motherboard socket or slot?
Will the chipset and BIOS support the upgraded processor?
Does the motherboard bus speed, rather than the CPU speed, limit the increase in speed you desire?
Is the upgrade processor compatible physically with the motherboard socket or slot?
Will the chipset and BIOS support the upgraded processor?
Does the motherboard bus speed, rather than the CPU speed, limit the increase in speed you desire?
Performance Levels and Recommended Processors :
Review :
· What are some questions you should
ask yourself before making recommendations for a CPU upgrade?
· What are you trying to achieve by
upgrading the CPU?
· Is the upgrade processor compatible
physically with the motherboard socket or slot?
· Will the chipset and BIOS support the
upgraded processor?
· Does the motherboard bus speed,
rather than the CPU speed, limit the increase in speed you desire?
Glossary
Arithmetic Logic Unit (ALU) :
A CPU
component that performs mathematical functions on data stored in the register
area.
Assembly Language :
A low-level
programming language in which a CPU’s instruction set is written.
Bus Unit :
The network
of circuitry that connects all the other major components together, accepts
data, and sends data through the input and output bus sections.
Cache :
A small
temporary memory area that is used to separate and store incoming data and
instructions.
Clock Doubling :
Running the
CPU at a multiple of the bus frequency.
Compiler :
A special
program that translates the higher-level language into machine language based
on the CPU’s instruction set.
Complex Instruction Set Computer (CISC) :
A CPU with a
complex instruction set.
Control Unit :
A CPU
component that controls the overall operation of the CPU.
Decode Unit :
A CPU
component that decodes instructions and data and transmits the data to other
areas in an understandable format.
Dual Independent Bus (DIB) :
A bus system
architecture in which one bus connects to the main memory and the other
connects with the L2 cache.
Dynamic Execution :
Dynamic Execution A term coined by Intel to describe the
enhanced, the superscalar, and the multiple branch prediction features
associated with the Pentium II.
Front Bus Side (FSB) :
Another term
for local bus.
Instructions :
Commands
given to the processor.
Instruction Set :
A set of
basic commands that control the processor.
L1 Cache :
A cache
contained within the processor that is designed to run at the processor’s
speed.
L2 Cache :
A cache mounted
outside of the processor.
(Note: the Pentium III incorporates the L2 cache in the processor.)
(Note: the Pentium III incorporates the L2 cache in the processor.)
L3 Cache :
The cache
mounted on the motherboard when L1 and L2 caches are incorporated into the CPU.
Math Coprocessor :
A component
of the CPU that improves the processor’s ability to perform advanced
mathematical calculations.
MMX Processor :
A processor
with an additional 56 commands that enhance its abilities to support multimedia
technology.
Multiple Branch Prediction :
A technique
that predicts what data element will be needed next, rather than waiting for
the next command to be issued.
Overclocking :
Forcing a
processor to operate faster than its approved speed.
Pin Grid Array (PGA) :
The pattern
of pins on a CPU.
Processor Affinity :
The ability
to select the number of CPU cores to apply to a software application.
Processor Throttling :
Controlling
processor frequency to conserve battery life and produce less heat.
Protected Mode :
An operating
mode which supports multitasking and allows access to memory beyond the first 1
MB.
Real Mode :
An operating
mode in which only the first 1 MB of a system’s RAM can be accessed. Also, an
operating mode in which the 286 or later processor emulates an 8088 or 8086
processor.
Reduced Instruction Set Computer (RISC) :
A type of
CPU architecture that is designed with a fewer number of transistors and
commands.
Registers :
Small
pockets of memory within the processor that are used to temporarily store data
that is being processed by the CPU.
Register Unit :
A CPU
component containing many separate, smaller storage units known as registers.
Simultaneous Threading :
Executing
two or more threads at the same time.
Single Edge Contact (SEC) :
A processor
configuration in which the CPU is mounted on a circuit board and the edge of
the circuit board inserts into the motherboard socket.
Superscalar :
Processing
multiple instructions simultaneously.
System Management Mode (SMM) :
A standby
mode developed for laptop computers in order to save electrical energy when
using a battery.
Thread :
Part of a
software program that can be executed independently of the entire program.
Virtual Mode :
An
operational mode in which the processor can operate several real mode programs
at once and access memory higher than the first 1 MB.
Zero Insertion Force (ZIF) Socket :
A processor
socket equipped with a lever to assist in the installation of the processor.
Discussion Questions
A client
wants to upgrade to Windows Vista and therefore asks if you could install a faster
processor in their system.
What are some questions you must answer before making any recommendations?
Under what conditions would you suggest your client also upgrade the motherboard.
What are some questions you must answer before making any recommendations?
Under what conditions would you suggest your client also upgrade the motherboard.
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